Evolutionary Design Papers
A compendium of publications related to Evolutionary Design
- Bazargan, K., Kastner, R. and Sarrafzadeh, M., "Fast template placement for reconfigurable computing systems," in IEEE Design & Test of Computers, Volume: 17, Issue: 1, pp. 68 - 83, Jan.-March 2000.
- Blodget, B., McMillan, S. and Lysaght, P., "A lightweight approach for embedded reconfiguration of FPGAs," in Proceedings of Design, Automation and Test in Europe Conference and Exhibition, pp. 399 - 400, Munich, GERMANY, 03-07 March 2003.
- Byungil Jeong, Sungjoo Yoo, Sunghyun Lee and Kiyoung Choi, "Hardware-software cosynthesis for run-time incrementally reconfigurable FPGAs," in Proceedings of Design Automation Conference, 2000, Asia and South Pacific, the ASP-DAC 2000, pp. 169 - 174, Yokohama, Japan, 25-28 Jan. 2000.
- Cadens, J.O., Megson, G.M. and Plaks, T.P., "Quantitative evaluation of three reconfiguration strategies on FPGAs: a case study," in Proceedings of The Fourth International Conference/Exhibition on High Performance Computing in the Asia-Pacific Region, Volume: 1, pp. 337 - 342, Beijing, China, 14-17 May 2000.
- Compton, K., Zhiyuan Li, Cooley, J., Knol, S. and Hauck, S., "Configuration relocation and defragmentation for run-time reconfigurable computing," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume: 10, Issue: 3, pp. 209 - 220, June 2002.
- Diessel, O., ElGindy, H., Middendorf, M., Schmeck, H.and Schmidt, B., "Dynamic scheduling of tasks on partially reconfigurable FPGAs," in Proceedings of IEE Computers and Digital Techniques, Volume: 147, Issue: 3, pp. 181 - 188, May 2000.
- Fong, R.J., Harper, S.J. and Athanas, P.M., "A versatile framework for FPGA field updates: an application of partial self-reconfiguration," in Proceedings of 14th IEEE International Workshop on Rapid Systems Prototyping, pp. 117 - 123, San Diego, California, 9-11 June 2003.
- Ganesan, S. and Vemuri, R., "An integrated temporal partitioning and partial reconfiguration technique for design latency improvement," in Proceedings of Design, Automation and Test in Europe Conference and Exhibition 2000, pp. 320 - 325, Paris, France, 27-30 March 2000.
- Gericota, M.G., Alves, G.R., Silva, M.L. and Ferreira, J.M., "Run-time management of logic resources on reconfigurable systems," in Proceedings of Design, Automation and Test in Europe Conference and Exhibition, 2003, Munich, GERMANY, 03-07 March 2003.
- Ghiasi, S. and Sarrafzadeh, M., "Optimal reconfiguration sequence management [FPGA runtime reconfiguration]," in Proceedings of Design Automation Conference, 2003, Asia and South Pacific, the ASP-DAC 2003, pp. 359 - 365, Kitakyushu, JAPAN, 21-24 Jan. 2003.
- Hauck, S., Zhiyuan Li and Schwabe, E., "Configuration compression for the Xilinx XC6200 FPGA," In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume: 18, Issue: 8, pp. 1107 - 1113, Aug. 1999.
- Kennedy, I., "Fast reconfiguration through difference compression," in Proceedings of 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003, pp. 265 - 266, Napa, CA, 9-11 April 2003.
- Mesquita, D., Moraes, F., Palma, J., Moller, L. and Calazans, N., "Remote and partial reconfiguration of FPGAs: tools and trends," in Proceedings of International Parallel and Distributed Processing Symposium, pp.8, Nice, France, 22-26, April 2003.
- Raghavan, A.K. and Sutton, P., "JPG - a partial bitstream generation tool to support partial reconfiguration in virtex FPGAs," in Proceedings of International Parallel and Distributed Processing Symposium, IPDPS 2002, pp.155 - 160, Fort Lauderdale, Florida, 15-19 April 2002.
- Satnam Singh and Phil James-Roxby, "Lava and JBits: From HDL to Bitstream in Seconds," in Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines FCCM '01, Rohnert Park, California, 29 April - 2 May, 2001
- Shirazi, N., Luk, W. and Cheung, P.Y.K., "Automating production of run-time reconfigurable designs," in Proceedings of IEEE Symposium on FPGAs for Custom Computing Machines, 1998, pp. 147 - 156, Napa Valley, CA, 15-17 April 1998.
- Walder, H., Steiger, C. and Platzner, M., "Fast online task placement on FPGAs: free space partitioning and 2D-hashing," in Proceedings of International Parallel and Distributed Processing Symposium, 2003, pp. 8, 22-26 April 2003.
- Wai-Kei Mak and Young, E.F.Y. "Temporal logic replication for dynamically reconfigurable FPGA partitioning," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume: 22, Issue: 7, pp. 952 - 959, July 2003.
See Also
The following pages contain links to publicly available websites and publications from journals, conferences and books that relate to various aspects of Evolvable Hardware