J. S. Yuan and R. F. DeMara, Application-Specific IC Design Using Asynchronous 
Methodologies, Theseus Logic, Inc., September 1999 - December 2002, $270,000 
plus $240,000 state match and $72,000 cost share for a total of $582,000.

J. S. Yuan, R. F. DeMara, and Z. Qu, Interdisciplinary Research in Computer 
Architecture, ASIC, and Microelectronics Testing and Characterization, Theseus 
Logic and UCF Presidential Research Infrastructure Initiative, January, 2000, 
$116,000.