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Recent Publications
- 03 October 2021: Our paper “Non-uniform Compressive Sensing via Ohmic Voltage Attenuation: A Memristive Crossbar Design Approach Leveraging Intrinsic Computation,” accepted to IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).
- 30 September 2021: Our paper “The Impact on Learning using Three-Attempt Tests in an Engineering Undergraduate Core Course: Dynamics,” accepted to 2022 American Society for Engineering Education Southeastern Conference.
- 30 September 2021: Our paper “Longitudinal Learning Outcomes from Engineering-Specific Adaptions of Hybrid Online Undergraduate Instruction,” accepted to International Journal of Emerging Technologies in Learning (iJET).
- 30 September 2021: Our paper “High Accuracy DBN-Fuzzy Neural Networks using MRAM-based Stochastic Neurons,” accepted to the IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (IEEE JxCDC). Selected to Special Topic on Emerging Hardware for Cognitive Computing.
- 16 September 2021: Our paper “Embedded STT-MRAM Energy Analysis for Intermittent Applications using Mean Standby Duration,” accepted to IEEE International Conference on Electronics Circuits and Systems (ICECS-2021).
- 13 April 2021: Our paper “Process Variation Sensitivity of Spin Orbit Torque Perpendicular Nanomagnets in DBNs,” accepted to IEEE Transactions on Magnetics (TMAG).
- 29 March 2021: Our paper “A Reconfigurable and Compact Spin-based Analog Block for Generalizable nth Power and Root Computation,” accepted to IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2021).
- 16 February 2021: Our paper “Authenticated Testing during Blended Delivery: Impacts on Assessment Scores within an Engineering Undergraduate Core Course,” accepted to American Society for Engineering Education (ASEE-SE-2021).
- 16 February 2021: Our paper with lab alum Dr. Salehi now at UCD titled “Adaptive Non-Uniform Compressive Sensing using SOT-MRAM Multi-bit Precision Crossbar Arrays,” accepted to IEEE Transactions on Nanotechnology (TNANO).
- 03 July 2020: Our paper “Electrically-Tunable Stochasticity for Spin-Based Neuromorphic Circuits: Self-Adjusting to Variation,” accepted to IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS).
- 27 February 2020: Our paper “Behavioral Simulation Educational Framework for 2-Terminal MTJ-based Analog to Digital Converter,” accepted to IEEE Integrated STEM Education Conference (ISEC-2020).
- 22 February 2020: Our paper “Short-Term Long-Term Compute-In-Memory Architecture: A Hybrid Spin/CMOS Approach Supporting Intrinsic Consolidation,” accepted to the IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (IEEE JxCDC). Selected to Special Issue on Exploratory Devices and Circuits for Compute-in-Memory.
- 01 February 2020: Our paper “Modular Simulation Framework for Process Variation Analysis of MRAM-based Deep Belief Networks,” accepted to IEEE SoutheastCon 2020 (SECon-2020).
- 04 January 2020: Our paper “Data Mining of Assessments to Generate Learner Remediation Teams: Method, Efficacy, and Perceptions in an Undergraduate Engineering Pilot Offering,” accepted to Journal of Educational Technology Systems.
- 21 December 2019: Our paper “Probabilistic Interpolation Recoder for Energy-Error-Product Efficient DBNs with p-bit Devices,” accepted to IEEE Transactions on Emerging Topics in Computing.
- 12 December 2019: Our submission to “Imparting Future Workforce Skills using Virtualized Active Learning: A Case Study in an Engineering Core Course” accepted for presentation at the Florida Online Innovation Summit (FOIS-2020).
- 25 November 2019: Our poster “Spin-based Analog to Digital Converter Interactive Simulation Interface” to appear in Proceedings of IEEE International Conference on Reconfigurable Computing and FPGAs (ReConfig’19).
- 23 November 2019: Our paper with Professor Appenzeller’s lab “A novel compound synapse using probabilistic spin-orbit-torque switching for MTJ based deep neural networks,” accepted to IEEE Journal of Exploratory Solid-State Computational Devices and Circuits as part of its Special Issue on Spin-Orbit Coupling Effects for Advanced Logic and Memory.
- 17 October 2019: Our paper “ApGAN: Approximate GAN for Robust Low Energy Learning from Imprecise Components,” accepted to IEEE Transactions on Computers.
- 16 October 2019: Our Pre-Conference Workshop “Virtualized Active Learning in STEM,” conducted at IEEE Frontiers in Education conference.
- 30 September 2019: Our paper “Mixed-Signal Spin/Charge Reconfigurable Array for Energy-Aware Compressive Signal Processing,” accepted to IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig 2019).
- 05 August 2019: Our paper “PARC: A novel design methodology for power analysis resilient circuits using spintronics,” accepted to IEEE Transactions on Nanotechnology – Letters (ENANO).
- 24 July 2019: Our paper “MRAM-Enhanced Low Power Reconfigurable Fabric with Multi-Level Variation Tolerance,” accepted to IEEE Transactions on Circuits and Systems I (TCAS-I).
- 12 July 2019: Our paper “Virtualized Active Learning for Undergraduate Engineering Disciplines (VALUED): A Pilot in a Large Enrollment STEM Classroom,” accepted to IEEE Frontiers in Education conference (FIE-2019).
- 12 July 2019: Our “Workshop on Virtualized Active Learning in STEM,” approved as a 4-hour Pre-Conference Workshop at IEEE Frontiers in Education conference (FIE-2019).
- 10 July 2019: Editorial and issue of IEEE Transactions on Computers “Special Section on Emerging Non-Volatile Memory Technologies: From Devices to Architectures and Systems,” published in IEEExplore August 2019 issue of IEEE Transactions on Computers.
- 01 June 2019: Our paper “Implementing Student-Created Video in Engineering: An Active Learning Approach for Exam Preparedness,” accepted to International Journal of Engineering Pedagogy (iJEP).
- 15 May 2019: Our paper “Leveraging Stochasticity for In-Situ Learning in Binarized Deep Neural Networks,” is Featured Article on the Front Cover of IEEE Computer magazine.
- 10 May 2019: Our paper “A High-Speed Ultra-Low-Power Subthreshold Spintronic Stochastic Spiking Neuron,” accepted to IEEE Midwest Symposium on Circuits and Systems (MWSCAS).
- 10 May 2019: Our poster “AQuRate: MRAM-based Stochastic Oscillator for Adaptive Quantization Rate Sampling of Spectrally Sparse Signals,” received Best Poster Award of the conference at the 28th ACM Great Lakes Symposium on VLSI (GLSVLSI).
- 01 May 2019: Our paper with Dr. Yu Bai “S-LIM XNN: A Energy Efficient Spintronic-Logic-in-Memory Based XNOR Neural Network Accelerator,” accepted to IEEE Transactions on Emerging Topics in Computing.
- 23 April 2019: Our paper “IRC: Cross-layer design exploration of Intermittent Robust Computation units for IoTs,” accepted to IEEE Computer Society Annual Symposium on VLSI.
- 03 April 2019: Our paper with Dr. Yu Bai “Energy Efficient Mobile Service Computing through Differential Spin-C-element: A Logic-in-Memory Asynchronous Computing Paradigm,” accepted to IEEE Access Special Issue on Mobile Service Computing with Internet of Things.
- 11 March 2019: Our paper “Leveraging Stochasticity for In-Situ Learning in Binarized Deep Neural Networks,” accepted to Computer (a.k.a. IEEE Computer Magazine) selected to Special Issue on Cognitive Computing Systems and Applications.
- 07 March 2019: Our paper “Subthreshold Spintronic Stochastic Spiking Neural Networks with Probabilistic Hebbian Plasticity and Homeostasis,” accepted to IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (IEEE JxCDC).
Selected to its Special Issue on Non-Volatile Memory for Efficient Implementation of Neural/Neuromorphic Computing.
- 27 February 2020: Our paper “Behavioral Simulation Educational Framework for 2-Terminal MTJ-based Analog to Digital Converter,” accepted to IEEE Integrated STEM Education Conference (ISEC-2020).
- 22 February 2020: Our paper “Short-Term Long-Term Compute-In-Memory Architecture: A Hybrid Spin/CMOS Approach Supporting Intrinsic Consolidation,” accepted to the IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (IEEE JxCDC). Selected to Special Issue on Exploratory Devices and Circuits for Compute-in-Memory..
- 01 February 2020: Our paper “Modular Simulation Framework for Process Variation Analysis of MRAM-based Deep Belief Networks,” accepted to IEEE SoutheastCon 2020 (SECon-2020).
- 04 January 2020: Our paper “Data Mining of Assessments to Generate Learner Remediation Teams: Method, Efficacy, and Perceptions in an Undergraduate Engineering Pilot Offering,” accepted to Journal of Educational Technology Systems.
- 21 December 2019: Our paper “Probabilistic Interpolation Recoder for Energy-Error-Product Efficient DBNs with p-bit Devices,” accepted to IEEE Transactions on Emerging Topics in Computing.
- 12 December 2019: Our submission to “Imparting Future Workforce Skills using Virtualized Active Learning: A Case Study in an Engineering Core Course” accepted for presentation at the Florida Online Innovation Summit (FOIS-2020).
- 25 November 2019: Our poster “Spin-based Analog to Digital Converter Interactive Simulation Interface” to appear in Proceedings of IEEE International Conference on Reconfigurable Computing and FPGAs (ReConfig’19).
- 23 November 2019: Our paper with Professor Appenzeller’s lab “A novel compound synapse using probabilistic spin-orbit-torque switching for MTJ based deep neural networks,” accepted to IEEE Journal of Exploratory Solid-State Computational Devices and Circuits as part of its Special Issue on Spin-Orbit Coupling Effects for Advanced Logic and Memory.
- 17 October 2019: Our paper “ApGAN: Approximate GAN for Robust Low Energy Learning from Imprecise Components,” accepted to IEEE Transactions on Computers.
- 16 October 2019: Our Pre-Conference Workshop “Virtualized Active Learning in STEM,” conducted at IEEE Frontiers in Education conference.