Matthew G. Parris, Carthink A. Sharma, and Ronald F. DeMara
University of Central Florida 
“Progress in Autonomous Fault Recovery of Field Programmable Gate Arrays”
accepted to ACM Computing Surveys December 27, 2009

The capabilities of current fault-handling techniques for Field Programmable Gate Arrays (FPGA) develop a descriptive classification ranging from simple Passive techniques to robust Dynamic methods.  Fault-handling methods not requiring modification of the FPGA device architecture or user intervention to recover from faults are examined and evaluated against overhead-based and sustainability-based performance metrics such as additional resource requirements, throughput reduction, fault capacity, and fault coverage.  This classification alongside these performance metrics forms a standard for confident comparisons.

Categories and Subject Descriptors: B.8.1 [Performance and Reliability]: Reliability, Testing, and Fault Tolerance; B.7.0 [Integrated Circuits]: General; I.2.8 [Artificial Intelligence]: Problem Solving, Control Methods, and Search; A.1 [General Literature]: Introductory and Survey
General Terms: Design, Performance, Reliability
Additional Key Words and Phrases: FPGA, evolvable hardware, autonomous systems, self test, reconfigurable architectures