P. J. Wilder and R. F. DeMara, "Microporcessor-based Parallel Architectures Using Multiport-Memory Interconnection Networks," Journal of Engineering Technology, Vol. 16, No. 1, March, 1999, pp. 24 - 31. Abstract: Parallel computer interconnections based on multiport memories offer attractive alternatives to link-oriented or bus-oriented interconnection networks(ICNs) for the rapid prototyping of microprocessor-based parallel machines. This paper presents an overview of multiport memory ICNs. It focuses on the NemNet hypercube interconnection network, which uses overlapping groups of four-port memories. The network provides each of the N processing elements(PEs) with Concurrent Read Exclusive write(CREW) access to log4N multiport memory modules. Along each of the cube's n dimensions, memory is shared with three other PEs for a connectivity of 3n, where n=[log4 N]. High connectivity is achieved while requiring on the order of NlogN memories. Details of a one-dimensional four- processor system are described, inculding a basic multiprocesing laboratory outline.