Publications – Missed Citations

Missed Citation

1. “Eight Group’s Citings of CAL”
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2. “Group Seven Citings of CAL Publications”
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3. “CAL Book Group Six Citings”
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4. “Comp Arch Lab Cites in Fifth Group”
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5. “Reconfigurable Computing Fabrics: Roles in Cloud Computing, Data Analytics, and Machine Learning”
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6. “Computer Architecture Lab’s Book Citings through 2017: Group One”
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7. “Computer Architecture Lab’s Book Citings through 2017: Group Two”
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8. “Computer Architecture Lab’s Book Citings through 2017: Group Three”
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9. “Computer Architecture Lab’s Citings through 2017: Group Four”
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10. M. Collin, M. Nikitovic, and R. Haukilahti, “SoCrates – A Scalable Multiprocessor System On Chip,”
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11. Fan, Junfei, and Jeffery Scott Hunt, “Port prioritization scheme,” U.S. Patent, 6,532,524, issued March 11, 2003.
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12. Evett, Matthew. “PARKA: a system for massively parallel knowledge representation,” Diss. University of Maryland, 1994.
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13. Olnowich, Howard T. “ALLNODE barrier synchronization network,” In Parallel Processing Symposium, 1995. Proceedings., 9th International, pp. 265-269. IEEE, 1995.
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14. Gannod, Barbara D., Abdol H. Esfahanian, and Eric Torng. “Source-limited inclusive routing: A new paradigm for multicast communication,” Networks 35, no. 1 (2000): 40-55.
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15. Lee, Chain-Wu. “TERRESA: A task-based message-driven parallel semantic network system,” PhD diss., State University of New York at Buffalo, 1999.
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16. Oatman, Robert K., Peter J. Herrera, Remy D. Sanouillet, and Charles E. Zimmerman. “To generate output representation in response to multiple inputs,” U.S. Patent 5,778,157, issued July 7, 1998.
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17. Lee, Chain-Wu, Chun-Hsi Huang, and Sanguthevar Rajasekaran. “TROJAN: a scalable distributed semantic network system,” In Tools with Artificial Intelligence, 2003. Proceedings. 15th IEEE International Conference on, pp. 219-223. IEEE, 2003.
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18. YANG, Sheng-gang, and Peng WANG. “An Anti-Laundering Data Mining System for China [J],”
    The Theory and Practice of Finance and Economics 6 (2005): 023.
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19. Hereford, James, and David Gwaltney. “Design space issues for intrinsic evolvable hardware,” In Evolvable Hardware, 2004. Proceedings. 2004 NASA/DoD Conference on, pp. 231-234. IEEE, 2004.
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20. Lee, Chain-Wu, Chun-Hsi Huang, Laurence Tianruo Yang, and Sanguthevar Rajasekaran. “Distributed path-based inference in semantic networks,”
    The Journal of Supercomputing 29, no. 2 (2004): 211-227.
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21. Chang-Biau Yang and Chiu-Chu Liu. “Multicast-Algorithms-on-the-Star Graph-Network,”
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22. Roberts, James D. “MISC: A Massively Parallel Architecture for Associative-Based Artificial Intelligence,”
    Ph. D. Thesis.
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23. M. A. Afshar Kazemi, M. Alborzi, Sh. Mahjoobravesh “Simulating the Production Line of Reinforcement Bars and Determining the nondominant Solutions for the Number of Cranes,”
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24. Malini Krishnamurthi, and Ryan Weitzman. “MapReduce: Discovering Money Launderers Using Data Mining Techniques,” Review of Business Research;2011, Vol. 11 Issue 3, p99.
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25. Russell, Ingrid, Zdravko Markov, and Neli Zlatareva. “Multicast Algorithms on the Star Graph Network,” In Proceedings of the 13th International Conference on Artificial Neural Networks. 2003.
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26. Rinner, Bernhard. “Design, Prototype Implementation and Experimental Evaluation of a Scalable Multiprocessor Architecture for Qualitative Simulation,” 1996.
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27. Liu, Deming, Ken Yi, and Pinzhong Liu. “Scalable Packet Scheduling Policy for Vast Number of Sessions,” U.S. Patent Application 13/210,576, filed August 16, 2011.
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