Publications – Technical Reports – Computer Architecture Laboratory

Technical Reports

A. Roohi, “Computer Architecture Lab’s Citings through 2019: Group Eight,” August 19, 2019.
[pdf]
A. Roohi, “Computer Architecture Lab’s Citings through 2019: Group Seven,” August 19, 2019.
[pdf]
A. Roohi, “Computer Architecture Lab’s Citings through 2019: Group Six,” August 19, 2019.
[pdf]
A. Roohi, “Computer Architecture Lab’s Citings through 2019: Group Five,” August 19, 2019.
[pdf]
S. D. Pyle, “Leveraging the Intrinsic Switching Behaviors of Spintronic Devices for Digital and Neuromorphic Circuits,”Doctoral Dissertation, Department of Electrical and Computer Engineering, University of Central Florida, May 02, 2019.
[pdf]
A. Roohi, “Normally-Off Computing Design Methodology Using Spintronics: from Devices to Architectures,”Doctoral Dissertation, Department of Electrical and Computer Engineering, University of Central Florida, May 02, 2019.
[pdf]
R. Zand, “Heterogeneous Reconfigurable Fabrics for In-Circuit Training and Evaluation of Neuromorphic Architectures,”Doctoral Dissertation, Department of Electrical and Computer Engineering, University of Central Florida, May 02, 2019.
[pdf]
F. S. Alghareb, “Soft-Error Resilience Framework for Reliable and Energy-Efficient CMOS Logic and Spintronic Memory Architectures,”Doctoral Dissertation, Department of Electrical and Computer Engineering, University of Central Florida, May 02, 2019.
[pdf]
R. F. DeMara, “Reconfigurable Computing Fabrics: Roles in Cloud Computing, Data Analytics, and Machine Learning,” March 14, 2019.
[pdf]
R. F. DeMara, “Concept of a Future FPGA Clearinghouse,” April 14, 2019.
[pdf]
R. Zand, A. Roohi, R. F. DeMara, “Fundamentals, Modeling and Application of Magnetic Tunnel Junctions,” August 27, 2018.
[pdf]
R. F. DeMara “Overview of Phoneme-based Video Indexing for Audio Transcript Reconstruction,” January 14, 2018.
[pdf]
“MIPS Assembly Program ALU Instructions Employing Multiple Look-Up Table (LUT) Designs,” July 01, 2018.
[pdf]
“Analyzing and understanding memory write operations in MRAM devices,” July 01, 2018.
[pdf]
“Understanding various spintronic-based mechanisms for memory write operations in MRAM devices,” July 01, 2018.
[pdf]
“MIPS Analysis of Memory-Write Programs,” July 01, 2018.
[pdf]
R. F. DeMara “Manuscript Handling Guidelines: Considerations Offered to the Guest Editor of Special Issues,” January 12, 2018.
[pdf]
R. F. DeMara, and R. A. Ashraf “Self-Organizing Middleware for Extreme Heterogeneity: The Role of Technology-Oblivious Machine Learning,” January 10, 2018.
[pdf]
R. F. DeMara “Heterogeneous Technology Configurable Fabrics: A Field-Programmable Paradigm for Leveraging Post-CMOS Devices in HPC,” January 10, 2018.
[pdf]
R. Al-Haddad, R. Oreifej, R. F. DeMara, and A. Ejnioui “Adaptive Mitigation of Radiation-Induced Errors and TDDB in Reconfigurable Logic Fabrics under a 10-State Markov Model,” September 15, 2014.
[pdf]
R. F. DeMara, “Adaptive Resilience Approaches for FPGA Fabrics,” November 20, 2017.
[pdf]
N. Imran, R. F. DeMara, J. Lee, and J. Huang, “Functional Priority Allocation using Resource Escalation (PAREs),” January 10, 2014.
[pdf]
R. F. DeMara, R. Zand, A. Roohi, S. Salehi, and S. Pyle, “Reconfigurable Spintronic Fabric using Domain Wall Devices,” December 20, 2014.
[pdf]
R. F. DeMara, K. Zhang, and C. A. Sharma, “Consensus-Based Evolvable Hardware for Sustainable Fault-Handling,” August 24, 2007.
[pdf]
R. F. DeMara, M. Lin, and J. S. Yuan “TELLTALE: Usage-Evident Electronic Components for Self-Attestation throughout the Supply Chain,” April 1, 2014.
[pdf]

Arman Roohi, “Computer Architecture Lab’s Book Citings through 2017: Group One”

[pdf]
Arman Roohi, “Computer Architecture Lab’s Book Citings through 2017: Group Two”

[pdf]
Arman Roohi, “Computer Architecture Lab’s Book Citings through 2017: Group Three”

[pdf]
Arman Roohi, “Computer Architecture Lab’s Citings through 2017: Group Four”

[pdf]
Proposal for Improvement of Energy Consumption and Dependability of Memory Read Bit-Cells
[pdf]
Representation of Read Operation of Memory Bit-Cells in Word Counting Program for a Set String
[pdf]
Search Command: Memory Read Instruction and Efficiency of the Sense Amplifiers
[pdf]
Propositions to improving reliability and low energy consumption in individual memory read cells
[pdf]
Comparision of Four Different Designs of Sense Amplifiers on Energy Consumption for Dynamic Instuction Count
[pdf]
The Comparison of Various Read Circuits and Sense Amplifier Operations Based on Energy Consumption
[pdf]
Fundamental Metrics of Memory Read Operation & Evaluation of Various Sense Amplifiers
[pdf]
Analysis of Various Memory-Read Sense Amplifiers Based Upon Total Energy Consumption
[pdf]
Comparing Post-CMOS Sense Amplifiers to Determine Design with Lowest Energy Consumption
[pdf]
Energy Consumption Analysis of Different ALU Look-up Table Based Circuit Designs
[pdf]
Comparing Energy Consumption of Look-Up Table Implemented Arithmetic Logic Units
[pdf]
MIPS Assembly Program ALU Instructions Employing Multiple Look-Up Table (LUT) Designs
[pdf] [doc]
[rtf] [txt]
Effects of Full-Adder Circuit Design on Assembly Program Total Energy Consumption
[pdf]
Analysis of Full Adder Circuit In a Program that Counts Occurrences of a User-Entered Word
[pdf]
Controlling Power Dissipation in Full-Adders by Enhancement of Logic Gate Design and Transistor Reduction
[pdf]
Analyzing the energy consumption of an algorithm using Conventional Mirror Adder approximations
[pdf] [doc]
[rtf] [txt]
Total Energy Consumption for Write from Four Proposed Circuit Designs
[pdf]
Balancing Microprocessor Reliability and Power Usage using Spintronics, FPGAs and Redundancy
[pdf]
Memory Write Power Conservation Trade-Offs in Bit-Cell Write Circuits Using MTJ, SHE, and STT Designs
[pdf]
In-Depth Analysis of the Optimization in Memory Write Operations between years 2004-2017
[pdf]
Analysis of memory bit-cells when comparing design implementation
[pdf]